TS-MAC-XM-UT4【PDF 2/66 页】SITE LICENSE ETH MAC TRI-SPD XP

您好，
买卖IC网欢迎您。
请登录
免费注册

Sheet目录1249

1页 [2页]3页 4页 5页 6页

Table of Contents

Chapter 1. Introduction .......................................................................................................................... 5

Quick Facts ........................................................................................................................................................... 5

Features ................................................................................................................................................................ 6

Chapter 2. Functional Description ........................................................................................................ 7

Configuration Options ........................................................................................................................................... 7

Classic TSMAC Option ................................................................................................................................ 7

1G or SGMII Configurable Options .............................................................................................................. 8

Functional Overview.............................................................................................................................................. 9

System Block Diagrams ...................................................................................................................................... 11

Core Signal Descriptions..................................................................................................................................... 14

Host Interface............................................................................................................................................. 19

Receive MAC (Rx MAC) ............................................................................................................................ 19

Transmit MAC (Tx MAC)............................................................................................................................ 22

Internal Data Buffer and FIFO Interfaces ................................................................................................... 24

(Optional) Media Independent Interface Management Module (MIIM) ...................................................... 24

Internal Registers ................................................................................................................................................ 25

Register Descriptions .......................................................................................................................................... 26

MODE (R/W) .............................................................................................................................................. 26

Transmit and Receive Control (R/W) ......................................................................................................... 27

Maximum Packet Size (R/W) ..................................................................................................................... 27

IPG (Inter-Packet Gap) (R/W) .................................................................................................................... 27

MAC Address Register {0,1,2} (R/W), Set of Three ................................................................................... 28

Transmit and Receive Status (RO) ............................................................................................................ 28

VLAN Tag (RO).......................................................................................................................................... 28

GMII Management Register Access Control (R/W) ................................................................................... 29

GMII Management Access Data (R/W)...................................................................................................... 29

Multicast Tables (R/W), Set of Eight .......................................................................................................... 29

Pause Opcode (R/W) ................................................................................................................................. 30

Timing Specifications .......................................................................................................................................... 30

Reception of a 64-Byte Frame Without Error -Rx MAC Application Interface............................................ 30

Reception of a 64-byte Frame with Error(s) - Rx MAC Application Interface............................................. 31

Reception of a 64-Byte Frame with FIFO Overflow - Rx MAC Application Interface ................................. 31

Successful Transmission of a 64-Byte Frame -Tx MAC Application Interface........................................... 32

Successful Transmission of a 64-byte Frame with FIFO Empty - Tx MAC Application Interface .............. 33

Aborted Transmission Due to FIFO Empty - Tx MAC Application Interface .............................................. 34

Reception and Transmission of 64-byte Frames With SGMII Easy Connect Option ................................. 34

Host Interface Read/Write Operation .................................................................................................................. 35

Management Interface Read/Write Operation .................................................................................................... 36

GMII Transmit and Receive Operations (1G mode and Gigabit MAC Option)........................................... 36

MII Transmit and Receive Operations (10/100 Mode) ............................................................................... 37

Chapter 3. Parameter Settings ............................................................................................................ 38

TSMAC Configuration Dialog Box....................................................................................................................... 38

Parameter Descriptions....................................................................................................................................... 38

MIIM_MODULE.......................................................................................................................................... 38

Operation Mode ......................................................................................................................................... 38

Synthesis/Simulation Tools Selection ........................................................................................................ 39

Chapter 4. IP Core Generation and Evaluation .................................................................................. 40

Licensing the IP Core.......................................................................................................................................... 40

Getting Started .................................................................................................................................................... 40

? 2010 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand

or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

IPUG51_03.0, December 2010

2

Tri-Speed Ethernet MAC User’s Guide

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

我的联系方式

*

*

*

相关PDF资料

TS250-130F-2 POLYSWITCH PTC RESET 0.13A SMD

TS250-130F-B-0.5-2 POLYSWITCH PTC RESET 0.13A SMD

TS250-130F-RB-2 POLYSWITCH PTC RESET 0.13A SMD

TS250-130F-RC-2 POLYSWITCH PTC RESET 0.13A SMD

TS250-130F-RC-B-0.5-2 POLYSWITCH PTC RESET 0.13A SMD

TS600-170F-2 POLYSWITCH PTC RESET 0.17A T/R

TS600-200F-RA-B-0.5-2 POLYSWITCH PTC RESET 0.20A SMD

TS600-400F-2 POLYSWITCH PTC RESET 0.40A SMD

相关代理商/技术参数

TSMBG0505C 制造商:未知厂家制造商全称:未知厂家功能描述:SINGLE BIDIRECTIONAL BREAKOVER DIODE|100V V(BO) MAX|DO-215AA

TSMBG0506C 制造商:未知厂家制造商全称:未知厂家功能描述:SINGLE BIDIRECTIONAL BREAKOVER DIODE|110V V(BO) MAX|DO-214AA

TSMBG0507C 制造商:未知厂家制造商全称:未知厂家功能描述:SINGLE BIDIRECTIONAL BREAKOVER DIODE|145V V(BO) MAX|DO-214AA

TSMBG0509C 制造商:未知厂家制造商全称:未知厂家功能描述:SINGLE BIDIRECTIONAL BREAKOVER DIODE|185V V(BO) MAX|DO-215AA

TSMBG0510C 制造商:未知厂家制造商全称:未知厂家功能描述:SINGLE BIDIRECTIONAL BREAKOVER DIODE|200V V(BO) MAX|DO-214AA

TSMBG0511C 制造商:未知厂家制造商全称:未知厂家功能描述:SINGLE BIDIRECTIONAL BREAKOVER DIODE|210V V(BO) MAX|DO-214AA

TSMBG0512C 制造商:未知厂家制造商全称:未知厂家功能描述:SINGLE BIDIRECTIONAL BREAKOVER DIODE|215V V(BO) MAX|DO-214AA

TSMBG0514C 制造商:未知厂家制造商全称:未知厂家功能描述:SINGLE BIDIRECTIONAL BREAKOVER DIODE|250V V(BO) MAX|DO-214AA